Digital Controller 176-Pin NFBGA

The DLPC300 digital controller, part of the DLP 0.3 WVGA chipset, supports reliable operation of the DLP3000 DMD.  The DLPC300 controller also provides a convenient, multi-functional interface between user electronics and the DMD, enabling high-speed pattern rates (up to 4 kHz binary), providing LED control and data formatting for multiple input resolutions.  The DLPC300 also outputs a trigger signal for synchronizing displayed patterns with a camera, sensor, or other peripherals.The DLPC300 controller enables integration of the DLP 0.3 WVGA chipset into small-form-factor and low-cost light steering applications.  Example end equipments for the 0.3 WVGA chipset include 3D scanning or metrology systems with structured light, interactive displays, chemical analyzers, medical instruments, and other end equipments requiring spatial light modulation (or light steering and patterning).The DLPC300 is one of the two devices in the 0.3 WVGA chipset (see ). The other device is the DLP3000 DMD. For proper operation of the chipset, the DLPC300 requires a serial flash device with configuration information. This information is loaded after (RESET)\ is released. The configuration information is available for download from DLPR300 product folder. See the data sheet (TI literature number DLPZ005) for further details.

Supports Reliable Operation of the DLP3000 DMD

Multi-Mode, 24-Bit Input Port:

• Supports Parallel RGB With Pixel Clock Up to
  33.5 MHz and 3 Input Color Bit-Depth Options:
  • 24-Bit RGB888 or 4:4:4 YCrCb888
  • 18-Bit RGB666 or 4:4:4 YCrCb666
  • 16-Bit RGB565 or 4:2:2 YCrCb565
• Supports 8-Bit BT.656 Bus Mode With Pixel
  Clock Up to 33.5 MHz

Supports Input Resolutions 608x684, 864x480,
854x480 (WVGA), 640x480 (VGA), 320x240 (QVGA)

Pattern Input Mode

• One-to-One Mapping of Input Data to Micromirrors
• 1-Bit Binary Pattern Rates up to 4000-Hz
• 8-Bit Grayscale Pattern Rates up to 120-Hz

Video Input Mode with Pixel Data Processing

• Supports 1Hz to 60Hz Frame Rates
• Programmable Degamma
• Spatial-Temporal Multiplexing (Dithering)
• Automatic Gain Control
• Color Space Conversion

Output Trigger Signal for Synchronizing
with Camera, Sensor, or Other Peripherals

System Control:

• I²C Control of Device Configuration
• Programmable Current Control of up to 3 LEDs
• Integrated DMD Reset Driver Control
• DMD Horizontal and Vertical Display Image Flip

Low Power Consumption: Only 93 mW (Typical)

External Memory Support:

• 166-MHz Mobile DDR SDRAM
• 33.3-MHz Serial FLASH

176-Pin, 7 × 7 mm with 0.4-mm Pitch VFBGA Package