Zero Delay PLL Clock Buffer Single Up to 133MHz 16-Pin SOIC N T/R

The MPC962309 is a zero delay buffer designed to distribute high-speed clocks. Available in a 16-pin SOIC or TSSOP package, the device accepts one reference input and drives nine low-skew clocks. The MPC962305 is the 8-pin version of the MPC962309 which drives five outputs with one reference input. The -1H versions of these devices have higher drive than the -1 devices and can operate up to 100/-133 MHz frequencies. These parts have on-chip PLLs which lock to an input clock presented on the REF pin. The PLL feedback is on-chip and is obtained from the CLOCKOUT pad.

• 1:5 LVCMOS zero-delay buffer (MPC962305)
• 1:9 LVCMOS zero-delay buffer (MPC962309)
• Zero input-output propagation delay
• Multiple low-skew outputs
• 250 ps max output-output skew
• 700 ps max device-device skew
• Supports a clock I/O frequency range of 10 MHz to 133 MHz, compatible with CPU and PCI bus frequencies
• Low jitter, 200 ps max cycle-cycle, and compatible with Pentium® based systems
• Test Mode to bypass PLL (MPC962309 only. See Table 3)
• 8-pin SOIC or 8-pin TSSOP package (MPC962305);16-pin SOIC or 16-pin TSSOP package (MPC962309), all Pb-free
• Single 3.3 V supply
• Ambient temperature range: -40°C to +85°C
• Compatible with the CY2305, CY23S05, CY2309, CY23S09
• Spread spectrum compatible