Shift Register Single 8-Bit Serial to Serial/Parallel 16-Pin SOIC T/R
The ’AHC595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear (SRCLR\) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs, except QH', are in the high-impedance state.Both the shift-register clock (SRCLK) and storage-register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
Operating Range 2-V to 5.5-V VCC 8-Bit Serial-In, Parallel-Out Shift Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Характеристики
| Бренд | Texas Instruments |
|---|---|
| Supplier | SOIC |
| Number Of | 1 |
| Screening Level | Commercial |
| Lead Finish | Gold |
| Msl Level | 1 |
| Описание продукта | 10 x 4 x 1.5 mm |
| Parallel | Нет |
| Number Of | 1 |
| Direction Type | Uni-Directional |
| Operation Mode | Serial to Serial/Parallel |
| Propagati | 50 pF |
| Maximum O | 5.5 V |
| Max Proce | 260 |
| Рабочая температура | -40 to 85 °C |
| Logic Function | Shift Register |
| Maximum P | 16.5@3.3V|10.2@5V ns |
| Minimum O | 2 V |
| Triggering Type | Positive-Edge |
| Output Type | 3-State |
| Number Of | 9 |
| Number Of | 8 |
| Typical O | 2.5|3.3|5 V |
| Terminal | Нет |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Страна происхождения | Malaysia |
SKU: SN74AHC595DR