Serializer/Deserializer 142-Pin BGA

The Intel LXT16727 form a high-performance multiplexer/demultiplexer (MUX/DeMUX) chipset for use in SDH STM 64 and SONET OC-192 telecommunications systems, Optical Transport Network (OTN) systems with Forward Error Correction (FEC), submarine systems, 10 Gigabit Ethernet systems, and fiber-optic test equipment. The Intel LXT16726 chipset is manufactured using a well-proven silicon bipolar technology that offers the performance, stability, and reliability customers require for optical communication systems. The devices are operated from a single +3.3V or dual +1.8/+3.3V power supply. The chipset has a low power dissipation of 1.8W (when operated from a dual power supply). The LXT16726 features an integrated Limiting Amplifier (LIA) with high input sensitivity, a Clock and Data Recovery unit (CDR), and a 1:16 DeMUX. The LXT16726 chipset features two concepts for timing alignment of clock and data signals. The first, Dynamic Phase Alignment (DPA), is based on integrated PLLs to eliminate any skew between clock and data signals between ASIC and MUX. The continuous handling of “round trip delay variations” by the source synchronous clocking ensures easy external optimization of jitter. The second scheme is based on a 9-bit FIFO to ensure critical timing alignment between clock and data signals. When the latter scheme is used, an integrated PLL together with an external VCXO can be used to clean the reference clock coming from the framer. In order to support multiple line speeds without using external selection components, the transmitter has been equipped with three VCXO clock inputs. In order to facilitate board design, the LXT16726 chipset has been equipped with bit flip and bit inversion. These features flip the polarity and/or position of the individual data I/Os to ensure flexible PCB routing. The devices allow operation at any line rate between 9.95 and 10.71Gbps. This provides for a flexible module with reduced design and production costs.

• Combined power dissipation of 1.8W
• Integrated LIA with high input sensitivity
• Single or dual power supply
• High output swing
• Multirate 10 –10.7Gbps
• 132-pin (13 x 13 mm) PBGA package
• Three VCXO clock inputs
• OIF SFI-4 compliant interface
• 9-bit FIFO and DPA
• Ideal for MSA Module applications where power is key
• Helps eliminate the need for an external LIA therefore reducing cost
• Helps increase design flexibility and ensures lowest possible power dissipation
• Ensures compatibility with a wide range of laser drivers
• For SONET and OTN transfer rates; seamless shift between rates
• Small physical form factor simplifies design and helps reduce board space
• Ensures seamless support for multiple line speeds without using external components
• Ensures interoperability between SerDes chips and framer
• Ensures alignment of data and clock signals coming from the framer