Serial and Parallel Low Side Pre FET Driver 28-Pin SSOP

The TPIC46L01, TPIC46L02, and TPIC46L03 are low-side predrivers that provide serial input interface and parallel input interface to control six external field-effect transistor(FET) power switches such as offered in the Texas Instruments TPIC family of power arrays. These devices are designed primarily for low-frequency switching, inductive load applications such as solenoids and relays. Fault status for each channel is available in a serial-data format. Each driver channel has independent off-state open-load detection and on-state shorted-load/short-to-battery detection. Battery overvoltage and undervoltage detection and shutdown are provided. Battery and output load faults provide real-time fault reporting to the controller. Each channel also provides inductive-voltage-transient protection for the external FET. These devices provide control of output channels through a serial input interface or a parallel input interface. A command to enable the output from either interface enables the respective channel GATE output to the external FET. The serial input interface is recommended when the number of signals between the control device and the predriver must be minimized, and the speed of operation is not critical. In applications where the predriver must respond very quickly or asynchronously, the parallel input interface is recommended. For serial operation, the control device must transition CS\ from high to low to activate the serial input interface. When this occurs, SDO is enabled, fault data is latched into the serial input interface, and the FLT\ flag is refreshed. Data is clocked into the serial registers on low-to-high transitions of SCLK through SDI. Each string of data must consist of 8 bits of data. In applications where multiple devices are cascaded together, the string of data must consist of 8 bits for each device. A high data bit turns the respective output channel on and a low data bit turns it off. Fault data for the device is clocked out of SDO as serial input data is clocked into the device. Fault data consists of fault flags for the over-battery voltage (bit 8), under-battery voltage (bit 7) (not on TPIC46L03), and shorted/open-load flags (bits 1-6) for each of the six output channels. A logic-high bit in the fault data indicates a fault and a logic-low bit indicates that no fault is present on that channel. Fault register bits are set or cleared asynchronously to reflect the current state of the hardware. The fault must be present when CS\ is transitioned from high to low to be captured and reported in the serial fault data. New faults cannot be captured in the serial register when CS\ is low. CS\ must be transitioned high after all of the serial data has been clocked into the device. A low-to-high transition of CS\ transfers the last 6 bits of serial data to the output buffer, puts SDO in a high-impedance state, and clears and reenables the fault register. The TPIC46L01/L02/L03 was designed to allow the serial input interfaces of multiple devices to be cascaded together to simplify the serial interface to the controller. Serial input data flows through the device and is transferred out SDO following the fault data in cascaded configurations. For parallel operation, data is asynchronously transferred directly from the parallel input interface (IN0-IN5) to the respective GATE output. SCLK or CS\ are not required for parallel control. A 1 on the parallel input turns the respective channel on, where a 0 turns it off. Note that either the serial interface or the parallel interface can enable a channel. Under parallel operation, fault data must still be collected through the serial data interface.

6-Channel Serial-In/Parallel-In Low-side Pre-FET Driver

Device Can Be Cascaded

Internal 55-V Inductive Load Clamp and V_GS Protection Clamp for External Power FETs

Independent Shorted-Load/Short-to-Battery Fault Detection on All Drain Terminals

Independent Off-State Open-Load Fault Sense

Over-Battery-Voltage Lockout Protection and Fault Reporting

Under-Battery Voltage Lockout Protection for TPIC46L01 and TPIC46L02

Asynchronous Open-Drain Fault Flag

Device Output Can Be Wire-ORed With Multiple External Devices

Fault Status Returned Through Serial Output Terminal

Internal Global Power-On Reset of Device

High-Impedance CMOS Compatible Inputs With Hysteresis

TPIC46L01 and TPIC46L03 Disables the Gate Output When a Shorted-Load Fault Occurs

TPIC46L02 Transitions the Gate Output to a Low-Duty Cycle PWM Mode When a Shorted-Load Fault Occurs