Second Generation System Basis Chip 32-Pin SOIC Rail

The 34903 is a member of the system basis chip (SBC) family. This chip is an analog companion chip for the MCU and combines several voltage regulators, interface, monitoring and control, and other features to enhance present module designs targeting the industrial market. It has a built-in enhanced high-speed CAN interface (ISO11898-2 and -5) with local and bus failure diagnostics, protection, and fail-safe operation modes. The SBC may include zero or one LIN 2.1 interface with LIN output pin switches. It includes up to three wake-up input pins that can also be configured as output drivers for flexibility. This device is powered by SMARTMOS technology.

Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with possibility of usage external PNP to extend current capability and share power dissipation

Extremely low quiescent current in LP modes

Fully protected embedded 5.0 V regulator for the CAN driver

Multiple undervoltage detections to address various MCU specifications and system operation modes

Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs, with overcurrent detection and undervoltage protection

MUX output pin for device internal analog signal monitoring and power supply monitoring

Advanced SPI, MCU, ECU power supply, and critical pins diagnostics and monitoring

Multiple wake-up sources in LP modes: CAN or LIN bus, I/O transition, automatic timer, SPI message, and VDD overcurrent detection

ISO11898-5 high-speed CAN interface compatibility for baud rates of 40 kb/s to 1.0 Mb/s

Scalable product family of devices ranging from 0 to 1 LIN, compatible to J2602-2 and LIN 2.1