RENR5F100BFANA#W0
True Low Power Platform (as low as 66 µA/MHz, and 0.57 µA for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 512 Kbyte Flash, 41 DMIPS at 32 MHz
- Ultra-Low Power Technology
- 1.6 V to 5.5 V operation from a single supply
- Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
- Halt (RTC + LVD): 0.57 µA
- Snooze: 0.70 mA (UART), 1.20 mA (ADC)
- Operating: 66 µA/MHz
- 16-bit RL78 CPU Core
- Delivers 41 DMIPS at maximum operating frequency of 32 MHz
- Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles
- CISC Architecture (Harvard) with 3-stage pipeline
- Multiply Signed & Unsigned: 16 x 16 to 32-bit result in 1 clock cycle
- MAC: 16 x 16 to 32-bit result in 2 clock cycles
- 16-bit barrel shifter for shift & rotate in 1 clock cycle
- 1-wire on-chip debug function
- Main Flash Memory
- Density: 16 KB to 512 KB
- Block size: 1 KB
- On-chip single voltage flash memory with protection from block erase/writing
- Self-programming with secure boot swap function and flash shield window function
- Data Flash Memory
- Data Flash with background operation
- Data flash size: 4 KB to 8 KB size options
- Erase Cycles: 1 Million (typ.)
- Erase/programming voltage: 1.8 V to 5.5 V
- RAM
- 2 KB to 32 KB size options
- Supports operands or instructions
- Back-up retention in all modes
- High-speed On-chip Oscillator
- 32 MHz with +/- 1% accuracy over voltage (1.8 V to 5.5 V) and temperature (-20 °C to 85 °C)
- Pre-configured settings: 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz
- Reset and Supply Management
- Power-on reset (POR) monitor/generator
- Low voltage detection (LVD) with 14 setting options (Interrupt and/or reset function)
- Data Memory Access (DMA) Controller
- Up to 4 fully programmable channels
- Transfer unit: 8- or 16-bit
- Multiple Communication Interfaces
- Up to 8 x I2
- C master
- Up to 2 x I2
- C multi-master
- Up to 8 x CSI/SPI (7-, 8-bit)
- Up to 4 x UART (7-, 8-, 9-bit)
- Up to 1 x LIN
- Extended-Function Timers
- Multi-function 16-bit timers: Up to 16 channels
- Real-time clock (RTC): 1 channel (full calendar and alarm function with watch correction function)
- Interval Timer: 12-bit, 1 channel
- 15 kHz watchdog timer : 1 channel (window function)
- Rich Analog
- ADC: Up to 26 channels, 10-bit resolution, 2.1 µs conversion time
- Supports 1.6 V
- Internal voltage reference (1.45 V)
- On-chip temperature sensor
- Safety Features (IEC or UL 60730 compliance)
- Flash memory CRC calculation
- RAM parity error check
- RAM write protection
- SFR write protection
- Illegal memory access detection
- Clock stop/ frequency detection
- ADC self-test
- General Purpose I/O
- 5V tolerant, high-current (up to 20 mA per pin)
- Open-Drain, Internal Pull-up support
- Different potential interface support: Can connect to a 1.8/2.5/3 V device
- Operating Ambient Temperature
- Standard: -40 °C to +85 °C
- Extended: -40 °C to +105 °C
- Package Type and Pin Count
- From 3mm x 3mm to 14mm x 20mm
- QFP: 44, 48, 52, 64, 80, 100, 128
- QFN: 24, 32, 40, 48
- SSOP: 20, 30
- LGA: 25, 36
- BGA: 64
Характеристики
| Бренд | Renesas Electronics |
|---|---|
| Schedule B | 8542310000 |
| HTSN | 8542310001 |
| Program M | 12 KB |
| Minimum O | 1.6 V |
| Screening Level | Industrial |
| Device Core | RL78 |
| On Chip Adc | 8-chx10-bit |
| Maximum O | 5.5 V |
| Рабочая температура | -40 to 85 °C |
| Watchdog | 1 |
| Operating | 3.3, 5 V |
| Program M | Flash |
| Ram Size | 1 KB |
| Number Of | 28 |
| Data Bus Width | 16 Bit |
| Maximum E | 1 MB |
| Instructi | CISC |
| Interface Type | CSI/I2C/LIN/UART |
| Number Of | 13 |
| Maximum Speed | 32 MHz |
| Family | R5F100 |
| Упаковка | Embossed Tape and Reel |
| Data Memo | 8 KB |
SKU: R5F100BFANA#W0