Quad Receiver 16-Pin SOIC T/R

The SN75ALSI97 is a monolithic, quadruple line receiver with 3-state outputs designed using advanced, low-power, Schottky technology. This technology provides combined improvements in bar design, tooling production, and wafer fabrication. This, in turn, provides significantly less power requirements and permits much higher data throughput than other designs. The device meets the specifications of ITU Recommendations V.10, V.11, X.26, and X.27. It features 3-state outputs that permit direct connection to a bus-organized system with a fail-safe design that ensures the outputs will always be high if the inputs are open. The device is optimized for balanced, multipoint bus transmission at rates up to 20 megabits per second. The input features high-input impedance, input hysteresis for increased noise immunity, and an input sensitivity of ±300 mV over a common-mode input voltage range of-7 V to 7 V. It also features active-high and active-low enable functions that are common to the four channels. The SN75ALS197 is designed for optimum performance when used with the SN75ALS192 quadruple differential line driver. The SN75ALS197 is characterized for operation from 0°C to 70°C.

Meets or Exceeds the Requirements of ITU Recommendations V.10, V.11, X.26, and X.27

Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments

Designed to Operate Up To 20 Mbaud

3-State Outputs

Common-Mode Input Voltage Range
- 7 V to 7 V

Input Sensitivity . . . ± 300 mV

Input Hysteresis . . . 120 mV Typ

High-Input Impedance . . . 12 kO Min

Operates from Single 5-V Supply

Low Supply Current Requirement
35 mA Max

Improved Speed and Power Consumption Compared to AM26LS32A