PLL Clock Buffer Single 20-Pin TSSOP

The PI6CEQ20200 Is a high performance PCIe Gen2/Gen3 zero delay buffer with two HCSL outputs.Pericoms proprietary equalization technique used in devicer imp[roves signal integrates and makes this device suitable for PCIe Gen2/Gen3 applications even when the from the main clock has to travel a long distance. PCIe Gen2/Gen3* comp[laint clock buffer/ZDB Internal equalization for bettersignal integrity 2 HCSL outputs Dual PLL bandwidth for SSc tracking Cycle-to-Cycle jitter:40ps(typ) Output-to-Output Skew <10ps 3.3V supply voltage TSSOP-20 packages