OR Gate 2-Element 2-IN CMOS 8-Pin SSOP T/R
This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC2G32 device performs the Boolean functionin positive logic.NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 3.8 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
<0.8 V at VCC = 3.3 V, TA = 25°C
>2 V at VCC = 3.3 V, TA = 25°C
JESD 78, Class II
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Характеристики
| Бренд | Texas Instruments |
|---|---|
| Maximum Q | 10 uA |
| Minimum O | 1.65 V |
| Lead Finish | Gold |
| Msl Level | 1 |
| Max Proce | 260 |
| Maximum O | 5.5 V |
| Maximum P | 3.8@3.3V|3.2@5V ns |
| Описание продукта | 2.95 x 2.8 x 1.29 mm |
| Logic Function | OR |
| Рабочая температура | -40 to 85 °C |
| Supplier | SSOP |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Страна происхождения | Japan |
SKU: SN74LVC2G32DCTR