NVRAM NVSRAM Parallel 2M-Bit 5V 32-Pin EDIP

The DS1249 2048k Nonvolatile (NV) SRAMs are 2,097,152-bit, fully static, nonvolatile SRAMs organized as 262,144 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is utomatically switched on and write protection is unconditionally enabled to prevent data corruption. There is no limit on the number of write cycles which can be executed and no additional support circuitry is required for microprocessor interfacing.

• 10 years minimum data retention in the absence of external power
• Data is automatically protected during power loss
• Unlimited write cycles
• Low-power CMOS operation
• Read and write access times of 70ns
• Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time
• Full ±10% V_CC operating range (DS1249Y)
• Optional ±5% V_CC operating range (DS1249AB)
• Optional industrial temperature range of -40°C to +85°C; designated IND
• JEDEC standard 32-pin DIP package