NAND Gate 4-Element 2-IN CMOS 14-Pin CDIP

CD4011B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix).

• Propagation delay time=60 ns (typ) at Cl=50 pF, Vdd=10 V
• Buffered inputs and outputs
• Standardized symmetrical output characteristics
• Maximum input current of 1 µA at 18 V Over full temperature package range;100 nA at 18 V and 25 °C
• 100% tested for quiescent current at 20 V
• 5-V, 10-V and 15-V parametric rating
• Noise margin (over full package temperature range
  • 1 V at Vdd = 5 V
  • 2 V at Vdd = 10 V
  • 2.5 V at Vdd = 15 V