LVPECL Clock Generator 8-Pin MLP

The CTSLV394 is a ÷1 or ÷2 clock generation part specifically designed to accommodate Colpitts or Pierce based oscillators. The tri-state compatible outputs allow for on-the-fly switching of multiple oscillators on a common bus. Other features are incorporated to reduce board components. A voltage reference and input biasing allows for easy oscillator interface.The CTSLV394 provides a ÷ 2 mode of operation for more frequency options and is selectable with a single connection. A selectable enable is also provided which doubles as a reset when the CTSLV394 is in ÷2 mode. With a single connection, the enable can be selected to operate as active high or active low.

• Selectable Divide Ratio
• Selectable Enable Priority and Threshold (CMOS or PECL)
• Tristate Compatible Outputs
• Input Buffer Powers Down when Disabled
• High BW [1.5GHz (÷1), 3.0GHz (÷2)]
• 3V to 5.5V Power Supply
• -145dBc/Hz (÷1) Typ Noise Floor
• -151dBc/Hz (÷2) Typ Noise Floor
• RoHS Compliant Pb Free Packages