LVDS Receiver 16-Pin TSSOP

The PI90LV032A are differential line receivers that use low-voltage differential signaling (LVDS) to support data rates in excess of 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption and low noise generation.A differential input signal (350mV) is translated by the device to 3V CMOS output level. Exclusive to the PI90LV032A quad receiver is a power-down mode that Three-states the outputs and places the device in a lowpower idle state (40mW typical).

• Signaling Rates >400Mbps (200 MHz)
• Single 3.3V Power Supply Design
• Accepts ±350mV (typical) Differential Swing
• Maximum Differential Skew of 0.35ns
• Maximum Propagation Delay of 3.3ns
• Low Voltage TTL (LVTTL) Outputs
• Industrial Temperature Operating Range: -40°C to 85°C
• Open, Short, and Terminated Fail Safe
• Meets or Exceeds IEEE 1596.3 SCI Standard
• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard
• Packaging (Pb-free & Green avaliable): SOIC, TSSOP, and MSOP