LVDS Receiver 16-Pin TSSOP

The MAX9179 is a quad, low-voltage differential signaling (LVDS) line receiver designed for applications requiring high data rates, low power dissipation, and noise immunity. The receiver accepts four LVDS input signals and translates them to 3.3V LVCMOS output levels at speeds up to 400Mbps. The receiver features built-in hysteresis, which improves noise immunity and prevents multiple switching on slow-transitioning inputs. The device supports a wide 0.038V to 2.362V common-mode input voltage range, allowing for ground potential differences and common-mode noise between the driver and the receiver. A fail-safe circuit sets the output high when the input is open, undriven and shorted, or undriven and terminated. Common enable inputs control the high-impedance outputs. The MAX9179 has a flow-through pinout for easy PC board layout. It is pin compatible with the MAX9121 and the DS90LV048A, but it also features high-ESD tolerance and built-in hysteresis. Available in 16-pin TSSOP and thin QFN packages, the MAX9179 operates from a single 3.3V supply and is specified for -40°C to +85°C operation.

• Guaranteed 400Mbps Data Rate
• 50mV (typ) Hysteresis
• Overshoot/Undershoot Protection (-1.0V or V_CC + 1.0V) on Enables
• IEC 61000-4-2 Level 4 ESD Tolerance
• AC Specifications Guaranteed with |V_ID| = 100mV
• Single 3.3V Supply
• Fail-Safe Circuit
• Flow-Through Pinout
  • Simplifies PC Board Layout
  • Reduces Crosstalk

Low-Power CMOS Design

Conforms to ANSI TIA/EIA-644 LVDS Standard

High-Impedance Inputs when Powered Off

Pin Compatible with the MAX9121 and the DS90LV048A

Small Thin QFN Package Available