LVDS Buffer 0.475V 10-Pin uMAX

The MAX9174/MAX9175 are 670MHz, low-jitter, low-skew 1:2 splitters ideal for protection switching, loopback, and clock and signal distribution. The devices feature ultra-low 1.0ps(RMS) random jitter (max) that ensures reliable operation in high-speed links that are highly sensitive to timing errors. The MAX9174 has a fail-safe LVDS input and LVDS outputs. The MAX9175 has an anything differential input (CML/LVDS/LVPECL) and LVDS outputs. The outputs can be put into high impedance using the power-down inputs. The MAX9174 features a fail-safe circuit that drives the outputs high when the input is open, undriven and shorted, or undriven and terminated. The MAX9175 has a bias circuit that forces the outputs high when the input is open. The power-down inputs are compatible with standard LVTTL/LVCMOS logic. The power-down inputs tolerate undershoot of -1V and overshoot of VCC + 1V. The MAX9174/MAX9175 are available in 10-pin µMAX and 10-lead thin QFN with exposed pad packages, and operate from a single +3.3V supply over the -40°C to +85°C temperature range.

• 1.0ps_(RMS) Jitter (max) at 670MHz
• 80ps_(P-P) Jitter (max) at 800Mbps Data Rate
• +3.3V Supply
• LVDS Fail-Safe Inputs (MAX9174)
• Anything Input (MAX9175) Accepts Differential CML/LVDS/LVPECL
• Power-Down Inputs Tolerate -1.0V and V_CC + 1.0V
• Low-Power CMOS Design
• 10-Lead µMAX and Thin QFN Packages
• -40°C to +85°C Operating Temperature Range
• Conform to ANSI TIA/EIA-644 LVDS Standard
• IEC 61000-4-2 Level 4 ESD Rating