Level Translator 5-Pin Flip-Chip T/R

The ST1G3234B is a dual supply low voltage CMOS 1-bit bus buffer level translator fabricated with sub-micron silicon gate and five-layer metal wiring C²MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation.The ST1G3234B is intended for one-way asynchronous communication between data buses. The input and output power-down protections disable the device when both power supply are down, so that the buses are effectively isolated.The input tolerant buffers allow to translate VCCB compatible signals and greater signals than VCCB up/down to VCCA. All inputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.The ST1G3234B is VCCA=0V tolerant, achieving very low current consumption when the VCCA is grounded.

High speed: t_PD = 4.4ns (Max.) at T_A = 85°C V_CCB = 1.65V; V_CCA = 3.0V

Low power dissipation: I_CCA = I_CCB = 5µA(Max.) at T_A = 85°C

Symmetrical output impedance: |I_OHA| = I_OLA = 10mA min at V_CCA = 2.75V; V_CCB = 1.4V to 3.6V |I_OHA| = I_OLA = 6mA min at V_CCA = 2.3V; V_CCB = 1.4V to 3.6V

Balanced propagation delays: t_PLHt_PHL

Power-down protection on inputs and outputs

26O series resistor on A-side outputs

Operating voltage range: V_CCA(Opr) = 1.4V to 3.6V V_CCB(Opr) = 1.4V to 3.6V

Allows partial power-down when V_CCA=0, device consumes very low quiescent current

Max data rates: 380Mbps (1.8V to 3.3V translation) 260Mbps (<1.8V to 3.3V translation) 260Mbps (translates to 2.5V) 210Mbps (translates to 1.5V)

Latch-up performance exceeds 500mA (JESD 17)

ESD performance: HBM > 2000V (MIL STD 883 method 3015); MM > 200V

R_OHS compliant to Flip-Chip package