Latch Transparent 9-CH D-Type 28-Pin PLCC Rail

The MC10E/100E175 is a 9-bit latch. It also features a tenth latched output, ODDPAR, which is formed as the odd parity of the nine data inputs (ODDPAR is HIGH if an odd number of the inputs are HIGH). The E175 can also be used to generate byte parity by using D8 as the parity-type select (L = even parity, H = odd parity), and using ODDPAR as the byte parity output. The LEN pin latches the data when asserted with a logical high and makes the latch transparent when placed at a logic low level.The 100 Series contains temperature compensation.

• 9-Bit Latch
• Parity Detection/Generation
• 800ps Max. D to Output
• Reset
• PECL Mode Operating Range: V_CC = 4.2 V to 5.7 V with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V with V_EE = -4.2 V to -5.7 V
• Internal Input Pulldown Resistors
• ESD Protection: > 1 kV HBM, > 75 V MM
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
  For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 416 devices
• Pb-Free Packages are Available