Interchange Digital Switch 208-Pin BGA

The IDT72V73273 has a non-blocking switch capacity of 32,768 x 32,768 channels at 32.768Mb/s. With 64 inputs and 64 outputs, programmable per stream control, and a variety of operating modes the IDT72V73273 is designed for the TDM time slot interchange function in either voice or data applications. Some of the main features of the IDT72V73273 are LOW power 3.3 Volt operation, automatic ST-BUS /GCI sensing, memory block programming, simple microprocessor interface , JTAG Test Access Port (TAP) and per stream programmable input offset delay, variable or constant throughput modes, output enable and processor mode, BER testing, bypass mode, and advanced block programming. The IDT72V73273 is capable of switching up to 32,768 x 32,768 channels without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the device maintains frame integrity in data applications and minimizes throughput delay for voice applications on a per-channel basis. The 64 serial input streams (RX) of the IDT72V73273 can be run at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s, 16.384Mb/s or 32.768Mb/s allowing 32, 64, 128, 256 or 512 channels per 125µs frame. The data rates on the output streams can independently be programmed to run at any of these data rates. With two main operating modes, Processor Mode and Connection Mode, the IDT72V73273 can easily switch data from incoming serial streams (Data Memory) or from the controlling microprocessor via Connection Memory. As control and status information is critical in data transmission, the Processor Mode is especially useful when there are multiple devices sharing the input and output streams. With data coming from multiple sources and through different paths, data entering the device is often delayed. To handle this problem, the IDT72V73273 has a Frame Offset feature to allow individual streams to be offset from the frame pulse in half clock-cycle intervals up to +7.5 clock cycles.

• Up to 64 serial input and output streams
• Maximum 32,768 x 32,768 channel non-blocking switching
• Accepts data streams at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s, 16.384Mb/s or 32.768Mb/s
• Rate matching capability: rate selectable on both RX and TX in eight groups of 8 streams
• Optional Output Enable Indication Pins for external driver High-Z control
• Per-channel Variable Delay Mode for low-latency applications
• Per-channel Constant Delay Mode for frame integrity applications
• Enhanced Block programming capabilities
• TX/RX Internal Bypass
• Automatic identification of ST-BUS® and GCI serial streams
• Per-stream frame delay offset programming
• Per-channel High-Impedance output control
• Per-channel processor mode to allow microprocessor writes to TX streams
• Bit Error Rate Testing (BERT) for testing
• Direct microprocessor access to all internal memories
• Selectable Synchronous and Asynchronous microprocessor bus timing modes
• IEEE-1149.1 (JTAG) Test Port
• 208-pin (17mm x 17mm) Plastic Ball Grid Array (PBGA)
• Operating Temperature Range -40°C to +85°C