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Hold Register Single 9-CH ECL 28-Pin PLCC Rail

The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0-D8 accepting parallel input data.The SEL (Select) input pin is used to switch between the two modes of operation HOLD and LOAD. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero.The 100 Series contains temperature compensation.
  • 700MHz Min. Operating Frequency
  • 9-Bit for Byte-Parity Applications
  • Asynchronous Master Reset
  • Dual Clocks
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
  • 75kW Input Pulldown Resistors
  • NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors
  • ESD Protection: > 2 KV HBM, > 200 V MM
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 484 devices
  • Pb-Free Packages are Available

Характеристики

Бренд ON Semiconductor
Minimum O -4.2|4.2 V
Lead Finish Matte Tin
Supplier PLCC
Bus Hold Нет
Msl Level 3
Polarity Non-Inverting
Max Proce 260|265
Описание продукта 11.58 x 11.58 x 3.69 mm
Maximum O -5.7|5.7 V
Maximum P 1@5V ns
Number Of 9
Screening Level Extended Commercial
Number Of 9
Number Of 9
Logic Function Hold Register
Typical O -5|5 V
Number Of 1
Triggering Type Positive-Edge
Output Si Single-Ended
Рабочая температура 0 to 85 °C
Input Sig Single-Ended
Schedule B 8542390000
HTSN 8542390001
Number Of 1
Reset Type Asynchronous
Maximum F 900 MHz
Страна происхождения United States
SKU: MC100E143FNG