FPGA Mezzanine Card Low Pin Count Functions Development Platform

The FM-PLPC is an FMC Prototype module which provides access to the complete LA bank of signals from the standard FMC Low Pin Count connector and the standard power rail and control signals.As the number of FMC carrier cards grows, the need for a means to rapidly prototype applications increases. The FM-PLPC addresses this need by economically providing a significant amount of area arranged in a grid for soldering or wire-wrapping standard .1” spaced components and connectors . In addition, the outline for the standard single width Mezzanine module is printed in silkscreen which enables the FM-PLPC to easily be trimmed to standard FMC mechanical dimensions.Key features of the FM-PLPC include:    Industry standard, modular FPGA I/O in an FPGA Mezzanine Card (VITA 57) module    FMC compliant with standard mounting holes and connector    Breakout of Low Pin Count connector pins to 0.1” development matrix    Standard FMC outline in silkscreen    Extended Ground rails and Power breakout for two power connections    Control signals available for user connections in development matrix    On board EEPROM footprint for configuration management and user data Industry standard, modular FPGA I/O in an FPGA Mezzanine Card (FMC, aka VITA 57), module FMC Compliant (when cut as marked) with standard mounting holes and connector Breakout of Low Pin count Connector (LPC) pins to 0.1” development matrix Standard FMC outline or extended length option Extended Ground rails and Power breakout for two power connections Control signals available for user connections in development matrix On board EEPROM footprint for configuration management and user data