Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC Tube

The ’HC74 and ’HCT74 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. This flip-flop has independent DATA, SET\, RESET and CLOCK inputs and Q and Q\ outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. SET\ and RESET are independent of the clock and are accomplished by a low level at the appropriate input. The HCT logic family is functionally as well as pin compatible with the standard LS logic family.

Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times

Asynchronous Set and Reset

Complementary Outputs

Buffered Inputs

Typical f_MAX = 50MHz at V_CC = 5V, C_L = 15pF, T_A = 25°C

Fanout (Over Temperature Range)

• Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
• Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Wide Operating Temperature Range . . . –55°C to 125°C

Balanced Propagation Delay and Transition Times

Significant Power Reduction Compared to LSTTL Logic ICs

HC Types

• 2V to 6V Operation
• High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V

HCT Types

• 4.5V to 5.5V Operation
• Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
• CMOS Input Compatibility, I_l =1µA at V_OL, V_OH