Flip Flop D-Type Bus Interface Pos-Edge 1-Element 16-Pin SOIC T/R
The ’AHC174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR)\ input and are designed for 2-V to 5.5-V VCC operation.Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Operating Range 2-V to 5.5-V VCC Contain Six Flip-Flops With Single-Rail Outputs Applications Include: Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Характеристики
| Бренд | Texas Instruments |
|---|---|
| Описание продукта | 10 x 4 x 1.5 mm |
| Maximum H | -8 mA |
| Bus Hold | Нет |
| Polarity | Non-Inverting |
| Set Reset | Master Reset |
| Number Of | 6 |
| Number Of | 6 |
| Triggering Type | Positive-Edge |
| Рабочая температура | -40 to 85 °C |
| Input Sig | Single-Ended |
| Maximum L | 8 mA |
| Number Of | 1 |
| Maximum P | 14.5@3.3V|9.2@5V ns |
| Maximum O | 5.5 V |
| Maximum Q | 0.004 mA |
| Output Si | Single-Ended |
| Logic Function | D-Type Bus Interface |
| Number Of | 6 |
| Propagati | 50 pF |
| Lead Finish | Gold |
| Supplier | SOIC |
| Max Proce | 260 |
| Typical O | 2.5|3.3|5 V |
| Msl Level | 1 |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Страна происхождения | Mexico |
SKU: SN74AHC174DR