Flash Parallel 3.3V 16Mbit 2M/1M x 8bit/16bit 70ns

The GLS36VF1601G are 1M x16 or 2M x8 CMOS Concurrent Read/Write Flash Memory manufactured with high performance SuperFlash memory technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The devices write (Program or Erase) with a 2.7-3.6V power supply and conform to JEDEC standard pinouts for x8/x16 memories.Featuring high performance Program, the GLS36VF160xG provide a typical Program time of 7 µsec and use Toggle Bit, Data# Polling, or RY/BY# to detect the completion of the Program or Erase operation. To protect against inadvertent write, the devices have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed endurance of 10,000 cycles. Data retention is rated at greater than 100 years.

• Organized as 1M x16 or 2M x8
• Dual Bank Architecture for Concurrent Read/Write Operation
  • 16 Mbit Bottom Sector Protection
  • GLS36VF1601G: 4 Mbit + 12 Mbit
  • 16 Mbit Top Sector Protection
• Single 2.7-3.6V for Read and Write Operations
• Superior Reliability
  • Endurance: 100,000 cycles (typical)
  • Greater than 100 years Data Retention
• Low Power Consumption:
  • Active Current: 6 mA typical
  • Standby Current: 4 µA typical
  • Auto Low Power Mode: 4 µA typical
• Hardware Sector Protection/WP# Input Pin
  • Protects the 4 outermost sectors (8 KWord) in the smaller bank by driving WP# low and unprotects by driving WP# high
• Hardware Reset Pin (RST#)
  • Resets the internal state machine to reading array data
• Byte# Pin
  • Selects 8-bit or 16-bit mode
• Sector-Erase Capability
  • Uniform 2 KWord sectors
• Chip-Erase Capability
• Block-Erase Capability
  • Uniform 32 KWord blocks
• Erase-Suspend / Erase-Resume Capabilities
• Fast Read Access Time
  • 70 ns
• Latched Address and Data
• Fast Erase and Program (typical):
  • Sector-Erase Time: 18 ms
  • Block-Erase Time: 18 ms
  • Chip-Erase Time: 35 ms
  • Program Time: 7 µs
• Automatic Write Timing
  • Internal VPP Generation
• End-of-Write Detection
  • Toggle Bit
  • Data# Polling
  • Ready/Busy# pin
• CMOS I/O Compatibility
• Conforms to Common Flash Memory Interface (CFI)
• JEDEC Standards
  • Flash EEPROM Pinouts and command sets
• Packages Available
  • 48-ball TFBGA (6mm x 8mm)
  • 48-lead TSOP (12mm x 20mm)
  • 56-ball LFBGA (8mm x 10mm)
• All non-Pb (lead-free) devices are RoHS compliant