DRAMs Parts and Modules

The IS42SM32160C is a 512Mb Mobile Synchronous DRAM configured as a quad 4M x32 DRAM. It achieves high-speed data transfer using a pipeline architecture with a synchronous interface. All inputs and outputs signals are registered on the rising edge of the clock input, CLK. The 512Mb SDRAM is internally configured by stacking two 256Mb, 16Mx16 devices. Each of the 4M x32 banks is organized as 8192 rows by 512 columns by 32 bits.

• Fully synchronous; all signals referenced to a positive clock edge
• Internal bank for hiding row access and precharge
• Programmable CAS latency: 2, 3
• Programmable Burst Length: 1, 2, 4, 8, and Full Page
• Programmable Burst Sequence:
• Sequential and Interleave
• Auto Refresh (CBR)
• TCSR (Temperature Compensated Self Refresh)
• PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full
• Deep Power Down Mode (DPD)
• Driver Strength Control (DS): 1/4, 1/2, and Full
• Configuration: 16Mx32
• Power Supply: Vdd/Vddq = 2.5V
• Package: 90 Ball BGA (8x13mm)
• Temperature Range: Industrial (-40°C to +85°C)
• Die revision: C