DRAMs Parts and Modules

ISSI’s 16Mb Synchronous DRAM IS42S16100F is organizedas a 524,288-word x 16-bit x 2-bank for improvedperformance. The synchronous DRAMs achieve highspeeddata transfer using pipeline architecture.

• Clock frequency: IS42/45S16100F: 200, 166, 143 MHz IS42VS16100F: 133, 100 MHz
• Fully synchronous; all signals referenced to a positive clock edge
• Two banks can be operated simultaneously and independently
• Dual internal bank controlled by A11 (bank select)
• Single power supply: IS42/45S16100F: Vdd/Vddq = 3.3V IS42VS16100F: Vdd/Vddq = 1.8V
• LVTTL interface
• Programmable burst length
  • (1, 2, 4, 8, full page)
• Programmable burst sequence: Sequential/Interleave
• 2048 refresh cycles every 32 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command
• Byte controlled by LDQM and UDQM
• Packages 400-mil 50-pin TSOP-II and 60-ball BGA
• Lead-free package option
• Available in Industrial Temperature