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DRAM Module DDR4 SDRAM 4Gbyte 288RDIMM

DRAM Module DDR4 SDRAM 4Gbyte 288RDIMM
  • Standard = JEDEC
  • Configuration = ECC
  • Number of Module Ranks = 1
  • Number of Devices = 9
  • Vdd = Vddq = 1.2V
  • Vpp = 2.5V
  • Vddspd = 2.25V to 2.75V
  • Cycle Time = 0.938ns
  • CAS Latency = 9, 11, 12, 13, 14, 15, 16
  • CAS Latency with Read DBI = TBD
  • Additive Latency = 0, CL - 1, and CL - 2
  • CAS Write Latency (CWL) = 9, 10, 11, 12, 14
  • Burst Length (BL) switch on-the-fly BL8 or BC4 (Burst Chop)
  • Burst Type = Sequential and Interleave
  • Bi-Directional Differential Data Strobe
  • On-Die Termination (ODT)
  • 8 bit pre-fetch
  • Device Package = FBGA
  • Lead Finish = = 0.76µm Gold
  • Length x Height = 133.35mm x 31.25mm
  • No. of sides = Double-sided
  • Mating Connector (Examples) Vertical = Molex - 0787261002 Vertical = TE Connectivity - 2199154-2
  • Bank Grouping is applied, and CAS to CAS latency (tCCD_L, tCCD_S) for the banks in the same or different bank group accesses are available
  • Supports ECC error correction and detection
  • Temperature sensor with integrated SPD
  • Per DRAM Addressability is supported
  • Internal VREF DQ level generation is available
  • Write CRC is supported at all speed grades
  • DBI (Data Bus Inversion) is supported (x8)
  • CA parity (Command/Address Parity) mode is supported
  • 288-Pins

Характеристики

Бренд SMART
Schedule B 8473300002
HTSN 8473302000
Typical O 1.2000 V
Module Type 288RDIMM
Organization 512Mx72
Total Density 4 GB
Sub Category DDR4 SDRAM
Supplier RDIMM
Chip Density 4 Gbit
SKU: SH5127RD451851SD