Demultiplexer 240-Pin EBGA

The AT84CS001 is a monolithic high-speed demultiplexer, used to lower a 10-bit data stream of up to 2.2 Gsps guaranteed rate by a selectable 4 or 2 ratio (a 1:8 ratio might be achieved by interleaving two DMUXes). The DMUX is a companion chip designed to fit perfectly with all of e2v’s high-speed ADCs and is capable of tracking the ADC’s output sampling rate over all operating frequency and temperature ranges.Thanks to its LVDS buffers, this DMUX can easily be interfaced with standard high-speed FPGAs (100O differentially terminated).

• High-speed ADC Family Companion Chip
• Selectable 1:2 or 1:4 DMUX Ratio
• Power Consumption: 2.7W
• LVDS Compatible Differential Data and Clock Inputs (100O Terminated)
• LVDS Compatible Differential Data and Data Ready Outputs
• Staggered or Simultaneous Data Outputs 11th Bit = Ports A, B, C and D Clock in Staggered Mode
• Selectable Active Edge for Input and Output Clocks: Only Rising: CLK and DR Mode Rising and Falling: CLK/2 and DR/2 Mode
• Fine Tuning of Input Clock Path Delay Compensation of External Data and Clock Path Misalignment and Skews Once Tuned, Setting is Valid over Full Operating Frequency and Over Full Specified Temperature Range
• Additional 11th Bit (Example: for Out-of-range Bit)
• Built-in Self Test (BIST)
• Stand-alone Tunable Delay Cell
• Power Supplies: VCCD = 3.3V (Digital), VPLUSD = 2.5V (Outputs)
• Power Consumption Reduction Mode: 1.15W
• EBGA240 Package