Decoder/Demultiplexer Single 4-to-10 16-Pin PDIP Tube

The ’HC42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard CMOS integrated circuits. These devices have the capability of driving 10 LSTLL loads and are compatible with the standard LS logic family. One of ten outputs (low on select) is selected in accordance with the BCD input. Non-valid BCD inputs result in none of the outputs being selected (all outputs are high). 

Buffered Inputs and Outputs

Typical Propagation Delay: 12ns at V_CC = 5V, C_L = 15pF, T_A = 25°C

Fanout (Over Temperature Range)

• Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
• Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Wide Operating Temperature Range . . . -55°C to 125°C

Balanced Propagation Delay and Transition Times

Significant Power Reduction Compared to LSTTL Logic ICs

HC Types

• 2V to 6V Operation
• High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V

HCT Types

• 4.5V to 5.5V Operation
• Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
• CMOS Input Compatibility, I_l =1µA at V_OL, V_OH