Data Retiming IC with Limiting Amplifier 32-Pin TQFP

The MAX3676 is a complete clock-recovery and data-retiming IC incorporating a limiting amplifier. It is intended for 622Mbps SDH/SONET applications and operates from a single +3.3V supply. The MAX3676 is designed for both section-regenerator and terminal-receiver applications in OC12/STM-4 transmission systems. Its jitter performance exceeds all SONET/SDH specifications. The MAX3676 has two differential input amplifiers: one accepts positive-referenced emitter-coupled logic (PECL) levels, while the other accepts small-signal analog levels. The analog inputs access the limiting amplifier stage, which provides both a received-signal-strength indicator (RSSI) and a programmable-threshold loss-of-power (LOP) monitor. Selecting the PECL amplifier disables the limiting amplifier, conserving power. A loss-of-lock (LOL) monitor is also incorporated as part of the fully integrated phase-locked loop (PLL).

• Single +3.3V or +5.0V Power Supply
• Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications
• Low Power: 237mW at +3.3V
• Selectable Data Inputs, Differential PECL or Analog
• Received-Signal-Strength Indicator
• Loss-of-Power and Loss-of-Lock Monitors
• Differential PECL Clock and Data Outputs
• No External Reference Clock Required