Counter Single 4-Bit Sync Binary UP 16-Pin SOIC T/R

The ’HC163, arepresettable synchronous counters that feature look-aheadcarry logic for use in high-speed counting applications. The’HC163 and ’HCT163devices are decade and binary counters, respectively, thatare reset synchronously with the clock. Counting andparallel presetting are both accomplished synchronouslywith the negative-to-positive transition of the clock.A low level on the synchronous parallel enable input, SPE,disables counting operation and allows data at the P0 to P3inputs to be loaded into the counter (provided that thesetup and hold requirements for SPE are met).All counters are reset with a low level on the Master Resetinput, MR. In the ’HC163 and ’HCT163 counters(synchronous reset types), the requirements for setup andhold time with respect to the clock must be met.Two count enables, PE and TE, in each counter areprovided for n-bit cascading. In all counters reset actionoccurs regardless of the level of the SPE, PE and TE inputsIf a decade counter is preset to an illegal state or assumesan illegal state when power is applied, it will return to thenormal sequence in one count as shown in state diagram.The look-ahead carry feature simplifies serial cascading ofthe counters. Both count enable inputs (PE and TE) mustbe high to count. The TE input is gated with the Q outputsof all four stages so that at the maximum count the terminalcount (TC) output goes high for one clock period. This TCpulse is used to enable the next cascaded stage

• ’HC163 4-Bit Binary Counter, Synchronous Reset
• Synchronous Counting and Loading
• Two Count Enable Inputs for n-Bit Cascading
• Look-Ahead Carry for High-Speed Counting
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il = 1µA at VOL, VOH