Counter Single 4-Bit Async Binary UP/Down 16-Pin SOIC T/R

The ALS191 is synchronous, reversible up/down counters. the ’ALS191 is a 4-bit binary counter. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four flip-flops are triggered on a low-to-high-level transition of the clock input if the enable input CTEN\ is low. A high at CTEN\ inhibits counting. The direction of the count is determined by the level of the down/up D/U input. When D/U\ is low, the counter counts up and when D/U\ is high, it counts down. These counters feature a fully independent clock circuit. Changes at the control inputs (CTEN\ and D/U\) that will modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter will be dictated solely by the condition meeting the stable setup and hold times. These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. The CLK, D/U\, and LOAD inputs are buffered to lower the drive requirement, which significantly reduces the loading on, or current required by, clock drivers, etc., for long parallel words. Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum count. The latter output produces a high-level output pulse with a duration approximately equal to one complete cycle of the clock while the count is zero (all outputs low) counting down or maximum (9 or 15) counting up. The ripple clock output produces a low-level output pulse under those same conditions but only while the clock input is low. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum/minimum count output can be used to accomplish look-ahead for high-speed operation. The SN54ALS190 and SN54ALS191 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS190 and SN74ALS191 are characterized for operation from 0°C to 70°C.

• Single Down/Up Count Control Line
• Look-Ahead Circuitry Enhances Speed of Cascaded Counters
• Fully Synchronous in Count Modes
• Asynchronously Presettable With Load Control
• Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
• Dependable Texas Instruments Quality and Reliability