Clock Fanout Buffer 6-OUT 16-Pin SOIC Tube

The CDC328 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control inputs (T\/C), various combinations of true and complementary outputs can be obtained.The CDC328 is characterized for operation from -40°C to 85°C.

Replaces SN74ABT328

Low Output Skew for Clock-Distribution and Clock-GenerationApplications

TTL-Compatible Inputs and Outputs

Distributes One Clock Input to Six Clock Outputs

Polarity Control Selects True or Complementary Outputs

Distributed V_CC and GND Pins Reduce Switching Noise

High-Drive Outputs (-15-mA I_OH, 64-mAI_OL)

State-of-the-Art EPIC-IIB ^TM BiCMOS DesignSignificantly Reduces Power Dissipation

Package Options Include Plastic Small-Outline (D) and ShrinkSmall-Outline (DB) Packages