Clock Fanout Buffer 10-OUT 24-Pin SSOP T/R

The Cypress series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industries fastest logic and buffers. The Cypress CY2CC1810 fanout buffer features one input and ten three-state outputs. Designed for data communications clock management applications, the large fanout from a single input reduces loading on the input clock. AVCMOS-type outputs dynamically adjust for variable impedance-matching and eliminate the need for seriesdamping resistors; they also reduce noise overall.

• Low-voltage operation
• VDD range from 2.5 to 3.3V
• 1:10 fanout
• Drives either a 50-ohm or 75-ohm transmission line
• Over voltage tolerant input hot swappable
• Low input capacitance
• Low output skew
• Low propagation delay
• Typical (tpd < 4 ns)
• High-speed operation > 200 MHz
• LVTTL-/LVCMOS-compatible input-Output disable to three-state
• Industrial versions available
• Packages available include: SOIC/SSOP