Clock Fanout Buffer 10-OUT 20-Pin SSOP T/R

The PI6C10810 is a 1.2V to 2.5V high-speed, low-noise 1-10 non-inverting clock buffer. The key goal in designing the PI6C10810 is to target networking applications that require lowskew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 60ps, the PI6C10810 is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems requires a tight level of skew from a large number of outputs. CLK0-4 operate from VDDA supply. CLK5-6 operate from VDDC supply. CLK7-9 operate from VDDB supply. High-speed, low-noise, non-inverting split 1-10 buffer Maximum Frequency up to 250 MHz Low output skew < 60ps (Bank A, 2.5V) Low duty cycle distortion < 200ps Low propagation delay < 2.0ns (2.5V) Choice of 1.2V, 1.5V, 1.8V or 2.5V supply voltage on Bank A, Bank B, Bank C Industrial temperature range: -40°C to 85°C