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Clock Driver 2-IN ECL/PECL 20-Pin TSSOP Rail

The MC100LVEP14 is a low skew 1 to 5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions.
  • 100 ps Device-to-Device Skew
  • 25 ps Within Device Skew
  • 400 ps Typical Propagation Delay
  • Maximum Frequency > 2 GHz Typical
  • PECL and HSTL Mode: VCC = 2.375 V to 3.8 V with VEE = 0 V
  • NECL Mode: VCC = 0 V with VEE = -2.375 V to -3.8 V
  • LVDS Input Compatible
  • Open Input Default State

Характеристики

Бренд ON Semiconductor
Minimum O -2.375|2.375 V
Max Proce 260|265
Maximum O -3.8|3.8 V
Описание продукта 6.6 x 4.5 x 1.05 mm
Msl Level 1
Supplier TSSOP
Operating -2.5|-3.3|2.5|3.3 V
Lead Finish Gold
Schedule B 8542390000
HTSN 8542390001
Страна происхождения Philippines
Configuration 1 x 2:1
Operation Mode Differential
Power Sup Single
Input Sig ECL|HSTL|PECL
Рабочая температура -40 to 85 °C
SKU: MC100LVEP14DTG Поставщик: по запросу