Clock Driver 16-Pin QFN EP Rail

The NB6L239 is a high-speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; divide 1/2/4/8 and divide 2/4/8/16. Both divider circuits drive a pair of LVPECL outputs.

• Maximum Clock Input Frequency; = 3GHz
• Input compatibility with LVDS/LVPECL/CML/HSTL
• 70 ps Typical Rise/Fall Times
• 5 ps Typcial Output-to-Output Skew
• Ex. 622.08MHz Input Generates 38.88MHz to 622.08 MHz Outputs
• Internal 50 O Termination Provided
• Random Clock Jitter = 1 ps RMS
• Divide-by-1 Edge of QA Aligned to QB divided Output
• Operating Range: V_CC = 2.375 V to 3.465 V with V_EE = 0 V
• Master Reset for Synchronization of Multiple Chips
• V_BBAC Reference Output
• Synchronous Output Disable/Enable
• Telecom/Datacom Routers, Swithes
• Pb-Free Packages are Available