Clock Divider Buffer 2-OUT 8-Pin SOIC N T/R

The MC10EL/100EL32 is an integrateddivide by 2 divider. The differential clock inputs and the V allow a differential, single-ended or AC coupled interface to the device. If used, the V output should be bypassed to ground with a 0.01 F capacitor. Also note that the V is designed to be used as an input bias on the EL32 only, the V output has limited current sink and source capability. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the reset allows for the synchronization of multiple EL32"s in a system.The 100 Series contains temperature compensation.

• 510ps Propagation Delay
• 3.0GHz Toggle Frequency
• ESD Protection: > 1 KV HBM, > 100 V MM
• PECL Mode Operating Range: V_CC= 4.2 V to 5.7 V with V_EE= 0 V
• NECL Mode Operating Range: V_CC= 0 V with V_EE= -4.2 V to -5.7 V
• Internal Input Pulldown Resistors on CLK(s) and R.
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
  For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 82 devices