Clock Divider Buffer 2-OUT 16-Pin QFN EP T/R

The NB7V33M is a differential divide by 4 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V33M produces a div 4 output copy of an input Clock operating up to 10GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon powerup, the internal flip-flops will attain a random state. The Reset allows for the synchronization of multiple NB7V33Ms in a system. The 16mA differential CML output provides matching internal 50-ohm termination which provides 400mV output swing when externally receiver terminated with 50-ohm to VCC. The NB7V33M is the div 4 version of the NB7V32M (div 2) and is offered in a low profile 3mm x 3mm 16-pin QFN package. The NB7V33M is a member of the GigaComm family of high performance clock products.

• Maximum Input Clock Frequency > 10 GHz, typical
• 260 ps Typical Propagation Delay
• 35 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV peaktopeak, typical
• Internal 50-ohm Input Termination Resistors
• Random Clock Jitter < 0.8 ps RMS
• -40°C to +85°C Ambient Operating Temperature