Clock Divider 2-IN ECL 52-Pin LQFP T/R

The MC100LVE222 is a low skew 1:15 differential w1/w2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used single-ended (with V output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pairs may be independently configured to fanout 1X or 1/2X of the input frequency. The LVE222 specifically guarantees low output to output skew. Optimal design, layout, and processing minimize skew within a device and from lot to lot. The fsel pins and CLK_Sel pin are asynchronous control inputs. Any changes may cause indeterminate output states requiring a MR pulse to resynchronize any 1/2X outputs. To ensure that the tight skew specification is realized, both sides of any differential output pair need to be terminated identically even if only one side is being used. When fewer than all fifteen pairs are used, identically terminate all the output pairs on the same package side whether used or unused. If no outputs on a side are used, then leave all these outputs open (unterminated). This will maintain minimum output skew. Failure to do this will result in a 10-20 ps loss of skew margin (propagation delay) in the output(s) in use. The MC100LVE222, as with most ECL devices, can be operated from a positive V supply in PECL mode. This allows the LVE222 to be used for high performance clock distribution in +3.3 V systems. Designers can take advantage of the LVE222"s performance to distribute low skew clocks across the backplane or the board. In a PECL environment series or Thevenin line, terminations are typically used as they require no additional power supplies. All power supply pins must be connected. . For a SPICE model, see Application Note A.

• 200ps Part-to-Part Skew
• 50ps Output-to-Output Skew
• Selectable 1x or 1/2x Frequency Outputs
• ESD Protection: >2 KV HBM, >200 V MM
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: V_CC = 3.0 V to 3.8 V with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V with V_EE = -3.0 V to -3.8 V
• Internal Input Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 2, For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 684 devices