Clock Divider 16-Pin QFN EP Rail

The NB7L32M is an integrated /2 divider with differential clock inputs and asynchronous reset.Differential clock inputs incorporate internal 50 O termination resistors and accept LVPECL (Positive ECL), CML, or LVDS. The high frequency reset pin is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple NB7L32M"s in a system.The differential 16 mA CML output provides matching internal 50 O termination which guarantees 400 mV output swing when externally receiver terminated 50 O to VCC.The device is housed in a small 3x3 mm 16 pin QFN package.

• Maximum Input Clock Frequency 14 GHz Typical
• 200 ps Max Propagation Delay
• 30 ps Typical Rise and Fall Times
• < 0.5 ps Maximum (RMS) Random Clock Jitter
• Operating Range: V_CC = 2.375 V to 3.465 V with V_EE = 0 V
• CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only
• 50 O Internal Input and Output Termination Resistors
• Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices
• Full RoHS Compliance.