Bus Termination Array 14-Pin SOIC T/R

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors.The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.The SN74ACT1071 is characterized for operation from -40°C to 85°C.

Designed to Ensure Defined Voltage Levels on Floating BusLines in CMOS Systems

Reduces Undershoot and Overshoot Caused By Line Reflections

Repetitive Peak Forward Current . . . I_FRM = 100 mA

Inputs Are TTL-Voltage Compatible

Low Power Consumption (Like CMOS)

ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015;Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Center-Pin V_CC and GND Configuration MinimizesHigh-Speed Switching Noise