Buffer/Line Driver 8-CH Inverting 3-ST CMOS 20-Pin SOIC T/R

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable OE inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

Wide Operating Voltage Range of 2 V to 6 V

High-Current Outputs Drive Up To 15 LSTTL Loads

Low Power Consumption, 80-µA Max I_CC

Typical t_pd = 9 ns

±6-mA Output Drive at 5 V

Low Input Current of 1 µA Max

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers