Buffer/Line Driver 8-CH Inverting 3-ST BiCMOS 20-Pin SSOP T/R

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are organized as two 4-bit buffer/line drivers with separate output-enable OE inputs. When OE is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)

Support Unregulated Battery Operation Down to 2.7 V

Typical V_OLP (Output Ground Bounce)
   <0.8 V at V_CC = 3.3 V, T_A = 25°C

I_off and Power-Up 3-State Support Hot Insertion

Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors

Latch-Up Performance Exceeds 500 mA Per JESD 17

ESD Protection Exceeds JESD 22

• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)