Buffer/Line Driver 6-CH Inverting 3-ST CMOS 16-Pin SOIC T/R

These hex buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC368 devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE and 2OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

Wide Operating Voltage Range of 2 V to 6 V

High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive Up To 15 LSTTL Loads

Inverting Outputs

Low Power Consumption, 80-µA Max I_CC

Typical t_pd = 10 ns

±6-mA Output Drive at 5 V

Low Input Current of 1 µA Max