Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin SOIC T/R

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

Controlled Baseline

• One Assembly/Test Site, One Fabrication Site

Enhanced Diminishing Manufacturing Sources (DMS) Support

Enhanced Product-Change Notification

Qualification Pedigree⁽¹⁾

Operates From 1.65 V to 3.6 V

Inputs Accept Voltages to 5.5 V

Max t_pd of 4.8 ns at 3.3 V

Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C

Typical V_OHV (Output V_OH Undershoot) >2 V at V_CC = 3.3 V, T_A = 25°C

Latch-Up Performance Exceeds 250 mA Per JESD 17

ESD Protection Exceeds JESD 22

• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)