Buffer/Line Driver 16-CH Non-Inverting 3-ST CMOS 48-Pin SSOP T/R

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH16541A is a noninverting 16-bit buffer composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Member of the Texas Instruments Widebus™ Family

Operates From 1.65 V to 3.6 V

Inputs Accept Voltages to 5.5 V

Max t_pd of 4.2 ns at 3.3 V

Typical V_OLP (Output Ground Bounce)
   <0.8 V at V_CC = 3.3 V, T_A = 25°C

Typical V_OHV (Output V_OH Undershoot)
   >2 V at V_CC = 3.3 V, T_A = 25°C

I_off Supports Partial-Power-Down Mode Operation

Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)

Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors

Latch-Up Performance Exceeds 250 mA Per JESD 17

ESD Protection Exceeds JESD 22

• 2000-V Human-Body Model (A114-A)
• 1000-V Charged-Device Model (C101)