Buffer 2-CH Non-Inverting CMOS 6-Pin SOT T/R
This dual buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.The SN74AUC2G34 performs the Boolean function Y = A in positive logic.NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Available in the Texas Instruments NanoFree™ Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub-1-V Operable Max tpd of 1.6 ns at 1.8 V Low Power Consumption, 10 µA at 1.8 V ±8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Характеристики
| Бренд | Texas Instruments |
|---|---|
| Msl Level | 1 |
| Max Proce | 260 |
| Logic Function | Buffer |
| Typical O | 1.8|2.5 V |
| Рабочая температура | -40 to 85 °C |
| Minimum O | 0.8 V |
| Screening Level | Commercial |
| Propagati | 30 pF |
| Lead Finish | Gold |
| Maximum L | 9 mA |
| Maximum O | 2.7 V |
| Supplier | SOT |
| Number Of | 2 |
| Polarity | Non-Inverting |
| Bus Hold | Нет |
| Описание продукта | 1.6 x 1.2 x 0.55 mm |
| Number Of | 2 |
| Number Of | 2 |
| Number Of | 2 |
| Input Sig | Single-Ended |
| Maximum P | 2.4@1.8V|1.8@2.5V ns |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Страна происхождения | Китай |
| Maximum Q | 10 uA |
| Tolerant I Os | 3.6 V |
| Maximum H | -9 mA |
SKU: SN74AUC2G34DRLR