ADPCM Processor 28-Pin PLCC

The DS2165 ADPCM processor chip is a dedicated digital-signal-processing (DSP) chip that has been optimized to perform adaptive differential pulse-code modulation (ADPCM) speech compression at three different rates. The chip can be programmed to compress (expand) 64kbps voice data down to (up from) either 32kbps, 24kbps, or 16kbps. The compression to 32kbps follows the algorithm specified by CCITT recommendation G.721 (July 1986) and ANSI document T1.301 (April 1987). The compression to 24kbps follows ANSI document T1.303. The compression to 16kbps follows a proprietary algorithm developed by Dallas Semiconductor. The DS2165 can switch compression algorithms on-the-fly. This allows the user to make maximum use of the available bandwidth on a dynamic basis.

• Compresses/expands 64kbps PCM voice to/from either 32kbps, 24kbps, or 16kbps
• Dual, fully independent channel architecture; device can be programmed to perform either:
  • two expansions
  • two compressions
  • one expansion and one compression

Interconnects directly to combo-codec devices

Input to output delay is less than 375µs

Simple serial port used to configure the device

On-board time-slot assigner-circuit (TSAC) function allows data to be input/output at various time slots

Supports channel associated signaling

Each channel can be independently idled or placed into bypass

Available hardware mode requires no host processor; ideal for voice storage applications

Backward-compatible with the DS2167 ADPCM processor chip

Single +5V supply; low-power CMOS technology

Available in 28-pin PLCC

3V operation version is available (DS2165QL)