ADC Single Pipelined 65Msps 14-bit Parallel 40-Pin TQFN EP T/R

The MAX12553 is a 3.3V, 14-bit, 65Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX12553 is optimized for low-power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12553 ideal for intermediate-frequency (IF) sampling applications. Powered from a single 3.15V to 3.60V supply, the MAX12553 consumes only 363mW while delivering a typical signal-to-noise (SNR) performance of 71dB at an input frequency of 175MHz. In addition to low operating power, the MAX12553 features a 150µW powerdown mode to conserve power during idle periods. A flexible reference structure allows the MAX12553 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12553 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12553 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC"s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 14-bit, parallel, CMOS-compatible output bus. The digital output format is pin selectable to be either two"s complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate digital power input accepts a wide 1.7V to 3.6V supply, allowing the MAX12553 to interface with various logic levels. The MAX12553 is available in a 6mm x 6mm x 0.8mm, 40-pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range. See a parametric table of the complete family of pin-compatible, 12-/14-bit high-speed ADCs.

• Direct IF Sampling Up to 400MHz
• Excellent Dynamic Performance
  • 74.0dB/71dB SNR at f_IN = 3MHz/175MHz
  • 90.6dBc/80.7dBc SFDR at f_IN = 3MHz/175MHz

Low Noise Floor: -76dBFS

3.3V Low-Power Operation

• 337mW (Single-Ended Clock Mode)
• 363mW (Differential Clock Mode)
• 150µW (Power-Down Mode)

Fully Differential or Single-Ended Analog Input

Adjustable Full-Scale Analog Input Range: ±0.35Vto ±1.10V

Common-Mode Reference

CMOS-Compatible Outputs in Two"s Complementor Gray Code

Data-Valid Indicator Simplifies Digital Design

Data Out-of-Range Indicator

Miniature, 40-Pin Thin QFN Package with ExposedPaddle

Evaluation Kit Available (Order MAX12555EVKIT)